Vacancy

UVM- FPGA Verification Engineer

Netherlands Electronics Eindhoven Hybrid

Join our team as an FPGA Verification Engineer! Develop UVM environments, verify complex designs, and mentor juniors. Work on innovative projects in Eindhoven. Apply now and boost your career!

About The Member Company

We are a global high-tech consultancy company with a team of entrepreneurial engineers, scientists, and digital experts from around the world. Together we form a fast-growing and proud community. We offer consultancy services to high-profile clients globally in diverse service areas, such as:

Technology & Engineering
Energy & Renewables
Life sciences & Pharma
Digital & IT

About this vacancy

We are looking for a highly skilled FPGA Verification Engineer with expertise in Universal Verification Methodology (UVM) to join our advanced team in Eindhoven. In this role, you will focus on verifying complex FPGA designs, ensuring they meet rigorous performance, functionality, and reliability standards. Working alongside a multidisciplinary team, you will play a key role in ensuring the quality and robustness of our FPGA-based solutions.

Key Responsibilities:

Develop and implement UVM-based verification environments to validate FPGA designs.
Define verification strategies, plans, and test scenarios based on design specifications.
Create, simulate, and debug testbenches to verify design functionality and performance.
Perform functional, code coverage, and assertion-based verification to ensure robust designs.
Identify, debug, and resolve design issues through simulation and detailed analysis.
Collaborate closely with FPGA designers to understand design intent and resolve verification bottlenecks.
Document verification methodologies, results, and lessons learned to support future projects.
Stay informed about advancements in UVM, FPGA verification techniques, and industry best practices.
Plan and execute verification from scratch.

What we expect from you

Bachelor's or Master's in Electrical/Computer Engineering.
5+ years of FPGA verification experience with UVM.
Experience with SystemVerilog and major FPGA tools (ModelSim, Questa, Vivado, Quartus).
Proficiency in scripting languages (Python, Perl, TCL).
Strong analytical and problem-solving skills.
Good communication skills in English.

What you can expect from us

Opportunities to work on innovative and impactful projects.
A supportive and collaborative team culture.
Professional growth and development.
A challenging and stimulating work environment in which you can be the director of your own career.
As an Employeneur, you are part of our TMC family. Next to our outstanding technical expertise, fun and engagement are meaningful parts of our culture.

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The 5 basic principles of employeneurship

A long-term working relationship

Enjoy the security of a long-term contract and a stable source of income while getting the opportunity to work at diverse projects.

Individual profit sharing

Full transparency. That’s it. For each of your projects, you know your hourly rate, your costs, and your individual performance-based profit sharing, all in order to stimulate your inner entrepreneur.

Business cells

Our employeneurs are grouped in business cells based on their technical expertise. They are small, focused and function as high-grade knowledge networks. And as buzzing communities of close colleagues.

YOUniversity

Every employeneur drives their own career. Together, we make a plan for personal and professional growth. Receive personal coaching and an extensive training budget to keep developing yourself and deliver outperformance at our clients.